1. Field of the Invention
The present invention relates generally to a mobile communication system and, more particularly, to a cell search method and apparatus for an asynchronous mobile communication system.
2. Description of the Related Art
Unlike a synchronous mobile communication system in which the timing of cells are synchronized with reference to a global reference time provided by a Global Positioning System (GPS), an asynchronous mobile communication system, such as a Universal Mobile Telecommunication System (UMTS), does not require its cells to be synchronized, but the mobile terminal is synchronized with a serving cell. In order to acquire timing synchronization with a cell operating asynchronously, the mobile terminal performs a cell search procedure. The cell search procedure is typically carried out in three steps: slot synchronization, frame synchronization and code-group identification, and scrambling-code identification. During the first step, the mobile terminal acquires slot synchronization with the cell by using a Primary Synchronization Channel (P-SCH) that is spread with a Synchronization Code (SC). During the second step, the mobile terminal acquires frame synchronization and identifies a code group of the cell found in the first step using a Secondary Synchronization Channel (S-SCH). During the third step, the mobile terminal determines a primary scrambling code used by the found cell within the code group. Through this three-step cell search procedure, the mobile terminal acquires timing synchronization with a cell in the asynchronous mobile communication system.
In a mobile communication system, frequency offset occurs through a difference in frequencies at which the local oscillators of the base station and the mobile terminal operate and frequency fading due to the mobility of the mobile terminal. When a mobile terminal that is equipped with an inaccurate local oscillator moves quickly, the frequency offset is likely to increase significantly. Since the three-step cell search procedure is carried out without frequency offset compensation, the frequency offset is one of the main factors that influences the performance of the cell search procedure. In the asynchronous mobile communication system, such as UMTS, it is impossible to estimate the frequency offset using pilot signals over a Common Pilot Channel (CPICH) in the initial cell search step. Methods for estimating the frequency offset using the P-SCH, which is common to all cells, as the pilot signals and compensating the estimated frequency offset by adjusting a Voltage Controlled Oscillator (VCO) or a Numerically Controlled Oscillator (NCO) have been provided. However, such a coherent estimation method requires an additional frequency offset estimation circuit and a frequency adjustment device, and thus increases implementation complexity. In order to avoid the complexity of the coherent estimation method and secure reliable performance insensitive to the frequency offset, an energy calculation-based asynchronous estimation method has been considered.
FIG. 1 is a block diagram illustrating a conventional cell search apparatus for the second step of a multi-step cell search procedure in mobile communication system.
Referring to FIG. 1, the conventional cell search apparatus for the second step of the multi-step cell search procedure consists of an S-SCH correlation block 110, an energy calculator 120, a memory 130, a Secondary Synchronization Code (SSC) sequence decoder 140, and a maximum detection block 150. The S-SCH correlation block 110 includes a z-sequence generator 111, a multiplier 112, an accumulator 114, and a Fast Hadamard Transformer (FHT) 116. If a received signal is input, the S-SCH correlation block 110 correlates the signal received during the first 256 chips (i.e. Synchronization Channel (SCH) duration) of every slot with 16 SSCs using the slot timing acquired at the slot synchronization step. Since the SSC is generated by multiplying a z-sequence and a Hadamard sequence, the correlation between the received signal and the SSC is carried out in two sub-steps. Specifically, the z-sequence generator 111 outputs a z-sequence, and the multiplier 112 disperses by multiplying the received signal corresponding to the first 256 chips of every slot by the z-sequence output by the z-sequence generator 111. The multiplier 112 removes the z-sequence from the received signal and outputs a de-spread signal. The accumulator 114 accumulates the de-spread signal output by the multiplier 112 per 16 chips and outputs 16-bit sequences. The FHT 116 performs 4-stage fast Hadamard transformation on the 16-bit sequence and outputs correlation values to the 16 SSCs.
The energy calculator 120 calculates the energies of the 16 correlation values output by the FHT 116 and outputs the calculated energies. The energy can be expressed as a sum of the squares of correlation values of an I-channel and a Q-channel. The memory 130 stores the correlation values calculated with the energies by slot. The SSC sequence decoding block 140 extracts the correlation values of the SSC indicated by the S-SCH codeword with reference to the S-SCH codeword, and accumulates the correlation values. The maximum value detection block 150 extracts a codeword having the maximum accumulated value among the accumulated values, a scrambling code group number corresponding to a number of cyclic shifts of the codeword, and frame boundary information.
As described above, the conventional noncoherent detection method for a cell search calculates correlation energy using the correlation results and accumulates the correlation energy. It is advantageous in reducing the complexity compared to the coherent detection method based on the frequency offset removal, however it degrades the performance. When the frequency offset is large, the conventional noncoherent detection method must reduce the synchronization accumulation length, which causes further degradation of detection performance.